1. Field of the Invention
The present invention generally relates to power supply circuits, and more particularly, to a power supply circuit that delays and outputs an output voltage with respect to an input voltage.
2. Description of the Related Art
Power supply circuits supplying drive power for driving, for example, amplifiers are provided with a delay circuit that delays the rise of the drive power for an amplifier so as to improve ripple rejection characteristics and prevent generation of shock noise at the rise of the power.
FIG. 1 is a circuit configuration diagram of an example of conventional power supply circuits.
Here, a description will be given by taking an amplifier circuit 1 as an example. The amplifier circuit 1 is constructed by a power supply circuit 11 and an amplifier 12. The power supply circuit 11 is a circuit that generates a drive voltage for supplying the drive voltage to the amplifier 12 based on a supply voltage Vcc that is supplied from a power terminal Tv. The amplifier 12 amplifies and outputs, from an output terminal Tout, an input signal that is input to an input terminal Tin based on the drive voltage supplied from the power supply circuit 11.
The power supply circuit 11 is constructed by a reference voltage generation circuit 21, a delay circuit 22, and an output circuit 23. The reference voltage generation circuit 21 is constructed by a constant-current source 31 and a Zener diode Dz. The constant-current source 31 generates a constant current I1 from the supply voltage Vcc applied to the power terminal Tv. The constant-current I1 is supplied to the Zener diode Dz.
The Zener diode Dz generates a Zener voltage Vz based on the constant current I1. The Zener voltage Vz is applied to the delay circuit 22. The delay circuit 22 is constructed by a resistance R1 and a capacitor C1. The delay circuit 22 has a time constant τ that is determined by the resistance R1 and the capacitor C1. The delay circuit 22 delays the Zener voltage Vz that is output from the reference voltage generation circuit 21 only for the time constant τ, and then supplies the Zener voltage to the output circuit 23. The capacitor C1 is an external component. One end of the capacitor C1 is connected to a terminal Tc and the other end is grounded.
The output circuit 23 is constructed by a NPN transistor Q1. In the transistor Q1, the delayed output of the delay circuit 22 is supplied to the base, the supply voltage Vcc is supplied to the collector from the power terminal Tv, and the drive voltage for the amplifier 12 is output from the emitter.
FIG. 2 is an illustrative drawing for explaining the operation of the conventional power supply circuit. FIG. 2-A indicates the supply voltage Vcc, and FIG. 2-B indicates the base potential and emitter potential of the transistor Q1.
When the supply voltage Vcc rises at time t0, the base potential VB and emitter potential VE of the transistor Q1 rise after being delayed by the delay circuit 22. On this occasion, the base potential VB of the transistor Q1 can be expressed by:VB=Vz−(IB×R1) . . . Equation  (1)where the output voltage of the reference voltage generation circuit 21 is Vz and the base current of the transistor Q1 is IB. The voltage (IB×R1) is the amount of voltage drop caused by the resistance, R1 of the delay circuit 22.
Further, the emitter potential VE of the transistor Q1 can be expressed by:VE=Vz−(IB×R1)−VF . . . Equation  (2)where VF represents the forward voltage between the base and emitter of the transistor Q1.
In the conventional power supply circuit, however, the resistance R1 of the delay circuit 22 causes voltage drop, and the supply voltage VE applied to the amplifier 12 assumes the voltage expressed by Equation (2)
On the other hand, regarding electronic circuits and electronic devices, there are demands for IC compatibility, cost reduction, miniaturization, and the like. In order to achieve IC compatibility, cost reduction, miniaturization, and the like, it is necessary to limit the capacitance of the capacitor C1 of the delay circuit 22. In order to obtain a delay time τ similar to that in the conventional power supply circuit while limiting the capacitance of the capacitor C1, it is necessary to increase the resistance R1.
When the resistance R1 is increased, the second term of Equation (2) is increased. Accordingly, the supply voltage VE is decreased. When the supply voltage VE is decreased, the amplifier circuit 1 shown in FIG. 1 encounters problems in that the peak magnitude of the amplifier 12 is decreased, for example.